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BUSE LED Matrix Display — Hardware Reference

This page documents the hardware architecture of the BUSE LED matrix display used in the driver development tutorial. Read this before attempting the BUSE Framebuffer Driver tutorial.

Prerequisites: Enable I2C / SPI basics

What You Will Learn
  • How multiplexed LED matrix displays work (column groups, shift registers, refresh rate)
  • The SPI wiring between the Raspberry Pi and the BUSE display
  • Data format: column select byte + row data through cascaded shift registers
  • Output Enable (OE) timing for brightness control

Display Technology Overview

The display featured in this tutorial is part of a passenger information system commonly used in public transportation vehicles, such as buses operated by BKV in Budapest.


How the Display Works

Multiplexed Driving

Multiplexing is a display control technique where only a portion of the LEDs are powered at any given moment, but they are refreshed fast enough that the human eye perceives a stable, fully lit image. This reduces the number of control lines and components, making the design more efficient and cost-effective, especially in large displays like public transport signs.

However, the refresh rate must be high enough to avoid visible flicker.


Panel Structure

A typical passenger information display consists of multiple panels, each with 19 rows and 32 columns. The indexing starts at the upper-left corner.

Column Group Multiplexing

The 32 columns of a panel are divided into 8 column groups, each containing 4 columns. The panel updates in four steps:

  • In each step, only one column (1st, 2nd, 3rd, or 4th) from each group is refreshed simultaneously.

This is shown in the illustration above.

Shift Register Details

Each column group is driven by three 8-bit shift registers to control the 19 row LEDs. Note that the first shift register in each group has unused pins (0–4), which must be considered when preparing the data.

Column Selection

The last shift register in the chain selects which column (1–4) of each group to activate. Column selection is zero-based, using the following binary values:

  • Column 1: 0x0

  • Column 2: 0x1

  • Column 3: 0x2

  • Column 4: 0x3

Because the display has no built-in memory (RAM) and uses multiplexed driving, the entire frame must be continuously retransmitted to maintain a visible image. If refreshing stops, the image fades almost immediately.

The data flow follows a First-In, First-Out (FIFO) structure. This means the data for the last shift register (column select) must be sent first, followed by row data.

Output Enable and Brightness Control

After all data is shifted in, the OE pin must be pulled low (active-low) to enable the outputs. The pulse width of OE controls the brightness of the display. A 50 µs pulse typically provides good results.


SPI Communication

Data transmission to the display can be done using the SPI peripheral of the Raspberry Pi 4:

  • MOSI (Master Out, Slave In) → Shift register data input (MSB first)

  • SCLK (Clock) → Shift register clock (up to 3 MHz)

  • SS (Chip Select / OE control) → Shift register Output Enable (active-low)

Tip

It is recommended to manually control the SS (Chip Select) line in software to fine-tune the OE pulse width for optimal brightness control.

Pinout

You can find the pinout of the Raspberry Pi here.

Connecting BUSE Display to Raspberry Pi

BUSE 16×32 Display Connect to Raspberry Pi Cable Color
GND GND (Pin 39) Black
MOSI GPIO10 (Pin 19) Purple
CS GPIO17 (Pin 11) Grey
SCLK GPIO11 (Pin 23) Green
Warning

Double-check the wiring before powering on. Connecting MOSI or SCLK to the wrong pin will not damage the display, but data will not appear. Connecting GND incorrectly can damage both the Pi and the display.

Example – 8×8 Display

For clarity, here’s a simplified 8×8 pixel example. The bit order corresponds to the numbering in the diagram. Following the described logic, you update only one column (1st, 2nd, 3rd, or 4th) in all groups at once. The shift register receives the data pattern shown in the table below.


Shift Registers

A shift register operates by moving binary data (0s and 1s) through a chain of flip-flops, one bit at a time, synchronized with a clock signal. You can imagine this process as a conveyor belt for bits. Each flip-flop stores a single bit, and on every clock pulse:

  • Each bit shifts to the next position.

  • A new bit enters from the input side.

  • The bit at the output may be discarded or used, depending on the application.

Shift registers are commonly 8 bits long and are typically used to convert serial data into parallel output. They often feature an Output Enable (OE) pin, which controls whether the shifted data appears on the output lines. The usual process is:

  1. Shift data into position.

  2. Enable outputs by pulling OE low.

If one shift register is insufficient for your design, multiple ICs can be cascaded by connecting the Data Out of one to the Data In of the next.


Next Step

Now that you understand the hardware, proceed to the BUSE Framebuffer Driver tutorial to implement a Linux kernel driver for this display.


Course Overview | Next: BUSE Framebuffer Driver →